Damascene processing is a method for forming metal lines on integrated circuits. It is often used because it requires fewer processing steps than other methods and offers a high yield. Through-silicon-vias (TSVs) are sometimes used in conjunction with Damascene processing to create three-dimensional (3D) packages and 3D integrated circuits by providing interconnection of vertically aligned electronic devices through internal wiring. Such 3D packages and 3D integrated circuits may significantly reduce the complexity and overall dimensions of a multi-chip electronic circuit. Conductive routes on the surface of an integrated circuit formed during Damascene processing or in TSVs are commonly filled with copper.
A TSV is a vertical electrical connection passing completely through a silicon wafer or die. A typical TSV process involves forming TSV holes and depositing a conformal diffusion barrier and conductive seed layers, followed by filling of TSV holes with a metal. Copper is typically used as the conductive metal in TSV fill as it supports high current densities experienced at complex integration, such as 3D packages and 3D integrated circuits. Copper also supports high device speeds. Furthermore, copper has good thermal conductivity and is available in a highly pure state.
TSV holes typically have high aspect ratios which makes void-free deposition of copper into such structures a challenging task. Chemical vapor deposition (CVD) of copper requires complex and expensive precursors, while physical vapor deposition (PVD) deposition often results in voids and limited step coverage. Electroplating is a more common method of depositing copper into TSV structures; however, electroplating also presents a set of challenges because of the TSV's large size and high aspect ratio.
In a typical TSV electrofilling process, the substrate is negatively electrically biased and is contacted with a plating solution which generally includes copper sulfate or methane sulphonate as a source of copper ions, as well as sulfuric acid or copper methane sulfonic acid for controlling conductivity, along with chloride ions and organic additives in various functional classes, known as suppressors, accelerators and levelers. However, the use of standard electrolytes and additives, for example with concentrations and materials typically used for damascene plating, often results in very slow plating and in formation of voids during TSV filling. Further, filling of TSVs is usually accompanied by deposition of substantial amounts of copper in the field region during the lengthy plating period (10 to 100 minutes), which later need to be removed to isolate the individual features by chemical mechanical polishing (CMP) and/or other planarization or etching methods. Further, conformal filling, which includes deposition of substantial amounts of copper on the TSV sidewalls, can result in seam voids that may trap electrolyte and can lead to non-functional connections.
While existing methods address some of the problems associated with TSV filling, both faster filling methods, and methods with more robust control over the quality of the filling process within an individual wafer and over the course of plating multiple wafers on a plating tool, are desired.